PRESERVING A DECOUPLING CAPACITOR'S CHARGE DURING LOW POWER OPERATION OF A LOGIC CIRCUIT

Systems and methods for preserving a decoupling capacitor's charge during low power operation of a logic circuit. An electronic circuit may include: a main voltage regulator coupled to a supply voltage terminal and configured to apply a first regulated voltage across a capacitor coupled in parallel with a logic circuit; a low power regulator coupled to the supply voltage terminal and configured to apply a second regulated voltage across the logic circuit; and a control circuit coupled to the low power regulator. The control circuit may be configured to: during a first mode of operation, allow the main voltage regulator to apply the first regulated voltage to the logic circuit, and, during a second mode of operation, allow the low power regulator to apply the second regulated voltage to the logic circuit and decouple the capacitor from the logic circuit while the low power regulator applies the second regulator voltage.