SILICON CARBIDE SEMICONDUCTOR DEVICE

A semiconductor device having, in an outer peripheral portion of an active region, and in a depth direction from a front surface of a semiconductor substrate, first to fourth outer peripheral regions, to thereby form steps that are recessed stepwise toward the center of the semiconductor device by a same width, and are arranged in an ascending order of the proximity to the center in the depth direction. The first, second, and fourth outer peripheral regions, respectively, are formed concurrently with p++-type contact regions, a p-type base region, and lower portions of p+-type regions in a center portion of the active region. An impurity concentration of the third outer peripheral region is 0.1 times to 0.5 times the impurity concentration of the upper portions of the p+-type regions. A voltage withstanding structure is formed in contact with an outer end of the first outer peripheral region.