SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device includes a stacked structure including insulating layers and conductive layers that are alternately disposed in a vertical direction, a first structure including a channel layer that passes through the stacked structure and a memory pattern between the channel layer and the stacked structure, and a second structure including an insulating pattern that is formed along a sidewall of the stacked structure and a gate pattern that is formed on a sidewall of the insulating pattern.