INLINE CIRCUIT EDIT

Lithographic methodologies involving, and apparatuses suitable for, inline circuit edits are described. In an example, an integrated circuit structure includes a first conductive line and a second conductive line in a first dielectric layer, the second conductive line laterally spaced apart from the first conductive line. The integrated circuit structure also includes a first conductive via and a second conductive via in a second dielectric layer, the second dielectric layer over the first dielectric layer, the second conductive via laterally spaced apart from the first conductive via, the first conductive via vertically over and connected to the first conductive line, and the second conductive via vertically over but separated from the second conductive line.