MEMORY INTEGRITY CHECK

A data processing device including a memory having a plurality of memory locations for respectively storing a value, wherein the data processing device has, for each memory location, an associated error detection memory area, a memory controller which is configured, when a value is written to a memo...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Sonnekalb, Steffen
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A data processing device including a memory having a plurality of memory locations for respectively storing a value, wherein the data processing device has, for each memory location, an associated error detection memory area, a memory controller which is configured, when a value is written to a memory location, to store an associated error detection code in the error detection memory area associated with the memory location, a memory access element, and an integrity checker configured to perform an EDC check.