ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION

The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: JOSSE, Emmanuel, INARD, Alain
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator JOSSE, Emmanuel
INARD, Alain
description The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear surface, selectively over the sheath so that a portion of said at least one via protrudes from the rear surface; depositing a silicon oxide insulating layer on the rear surface; polishing the insulating layer to expose the core while leaving in place a portion of the thickness of the insulating layer; and forming a conductive electrode in contact with the core.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023352513A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023352513A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023352513A13</originalsourceid><addsrcrecordid>eNrjZDB29XF1DgnydHb0UXD29_MDcjz9_RQc_VwUPEOCFXxdQzz8XRT83RTcHJ1AqkCyPAysaYk5xam8UJqbQdnNNcTZQze1ID8-tbggMTk1L7UkPjTYyMDI2NjUyNTQ2NHQmDhVACKCJ8U</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION</title><source>esp@cenet</source><creator>JOSSE, Emmanuel ; INARD, Alain</creator><creatorcontrib>JOSSE, Emmanuel ; INARD, Alain</creatorcontrib><description>The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear surface, selectively over the sheath so that a portion of said at least one via protrudes from the rear surface; depositing a silicon oxide insulating layer on the rear surface; polishing the insulating layer to expose the core while leaving in place a portion of the thickness of the insulating layer; and forming a conductive electrode in contact with the core.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231102&amp;DB=EPODOC&amp;CC=US&amp;NR=2023352513A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231102&amp;DB=EPODOC&amp;CC=US&amp;NR=2023352513A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JOSSE, Emmanuel</creatorcontrib><creatorcontrib>INARD, Alain</creatorcontrib><title>ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION</title><description>The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear surface, selectively over the sheath so that a portion of said at least one via protrudes from the rear surface; depositing a silicon oxide insulating layer on the rear surface; polishing the insulating layer to expose the core while leaving in place a portion of the thickness of the insulating layer; and forming a conductive electrode in contact with the core.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB29XF1DgnydHb0UXD29_MDcjz9_RQc_VwUPEOCFXxdQzz8XRT83RTcHJ1AqkCyPAysaYk5xam8UJqbQdnNNcTZQze1ID8-tbggMTk1L7UkPjTYyMDI2NjUyNTQ2NHQmDhVACKCJ8U</recordid><startdate>20231102</startdate><enddate>20231102</enddate><creator>JOSSE, Emmanuel</creator><creator>INARD, Alain</creator><scope>EVB</scope></search><sort><creationdate>20231102</creationdate><title>ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION</title><author>JOSSE, Emmanuel ; INARD, Alain</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023352513A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>JOSSE, Emmanuel</creatorcontrib><creatorcontrib>INARD, Alain</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JOSSE, Emmanuel</au><au>INARD, Alain</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION</title><date>2023-11-02</date><risdate>2023</risdate><abstract>The present description concerns a manufacturing method comprising the following steps: providing a silicon substrate having a via penetrating into the substrate from its front surface and comprising a silicon conductive core and a silicon oxide insulating sheath; etching the substrate from its rear surface, selectively over the sheath so that a portion of said at least one via protrudes from the rear surface; depositing a silicon oxide insulating layer on the rear surface; polishing the insulating layer to expose the core while leaving in place a portion of the thickness of the insulating layer; and forming a conductive electrode in contact with the core.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2023352513A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title ELECTRICAL CONNECTION AND ITS METHOD OF FABRICATION
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T23%3A21%3A23IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JOSSE,%20Emmanuel&rft.date=2023-11-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023352513A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true