LATCH-BASED STORAGE CIRCUITS HAVING EFFICIENT INTEGRATED CIRCUIT LAYOUTS

A storage circuit includes a multi-stage latch circuit having first to fourth transistor pairs therein, which respectively include a pull-up transistor and a pull-down transistor connected in series through a corresponding one of first to fourth storage nodes. An access circuit is provided, which ha...

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Bibliographische Detailangaben

Hauptverfasser:	Chang, Ikjoon, Sohn, Kyomin, Kang, Youngmin, Lee, Kijun
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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