DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARATUS USING THE DELAY LINE AND THE DELAY LOCKED LOOP CIRCUIT

A delay locked loop circuit includes a delay line, a phase detector, a selection controller, and a charge pump. The delay line delays, based on a delay control voltage, a reference clock signal to generate an internal clock signal and a feedback clock signal. The phase detector compares phases of th...

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Bibliographische Detailangaben
Hauptverfasser: HAN, Yun Tack, KIM, Kyeong Min
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A delay locked loop circuit includes a delay line, a phase detector, a selection controller, and a charge pump. The delay line delays, based on a delay control voltage, a reference clock signal to generate an internal clock signal and a feedback clock signal. The phase detector compares phases of the internal clock signal and the feedback clock signal to generate a first detection signal and a second detection signal. The selection controller provides the reference clock signal as an up-signal and a down-signal. The charge pump generates the delay control voltage based on the up-signal and the down-signal.