SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor memory device includes a substrate, contact electrodes extending in a first direction, each of the contact electrodes including a connection portion having a first thickness and a landing portion having a second thickness, an uppermost contact electrode above the contact electrodes, the contact electrodes being longer in the first direction than the uppermost contact electrode and defining a step structure, transistor bodies extending in a second direction and having a first source/drain, a monocrystalline channel layer, and a second source/drain sequentially arranged in the second direction, the monocrystalline channel layer being connected to a corresponding contact electrode, a lower electrode layer connected to the second source/drain of each of the transistor bodies, a capacitor dielectric layer covering the lower electrode layer and having a uniform thickness, and an upper electrode layer separated from the lower electrode layer by the capacitor dielectric layer.