MEMORY CONTROLLER WITH ARITHMETIC LOGIC UNIT AND/OR FLOATING POINT UNIT

MEMORY CONTROLLER WITH ARITHMETIC LOGIC UNIT AND/OR FLOATING POINT UNIT

Techniques for performing an operation at a memory controller are described. An example includes decoder circuitry to decode a single instruction, the single instruction to include one or more fields for an opcode to indicate an arithmetic or Boolean operation to be performed by a memory controller,...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: Ould-Ahmed-Vall, Elmoustapha
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Techniques for performing an operation at a memory controller are described. An example includes decoder circuitry to decode a single instruction, the single instruction to include one or more fields for an opcode to indicate an arithmetic or Boolean operation to be performed by a memory controller, and one or more fields to identify at least one source location; and execution circuitry of the memory controller to execute the decoded instruction according to the opcode.