BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A HOST DEVICE
Methods, systems, and devices for buffer configurations for communications between memory dies and a host device are described. A memory device may include a buffer having a first interface coupled with a host device and a second interface coupled with a memory die of the memory device. The first in...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Methods, systems, and devices for buffer configurations for communications between memory dies and a host device are described. A memory device may include a buffer having a first interface coupled with a host device and a second interface coupled with a memory die of the memory device. The first interface may communicate information with the host device at a first frequency and according to a first signaling scheme, and the second interface may communicate information with the memory die at a second frequency and according to a second signaling scheme. The first frequency may be higher than the second frequency, and the second signaling scheme may include a greater quantity of voltage levels than the first signaling scheme. |
---|