INTEGRATED CIRCUIT STRUCTURES HAVING METAL GATE PLUG LANDED ON DIELECTRIC ANCHOR

Integrated circuit structures having metal gate plug landed on dielectric anchor, and methods of fabricating integrated circuit structures having metal gate plug landed on dielectric anchor, are described. For example, an integrated circuit structure includes a sub-fin in a shallow trench isolation (STI) structure. A plurality of horizontally stacked nanowires is over the sub-fin. A gate dielectric material layer is surrounding the horizontally stacked nanowires. A gate electrode structure is over the gate dielectric material layer. A dielectric structure is laterally spaced apart from the plurality of horizontally stacked nanowires, the dielectric structure having a bottommost surface below an uppermost surface of the STI structure. A dielectric gate plug is on the dielectric structure.