SEMICONDUCTOR PACKAGE INTERCONNECT AND POWER CONNECTION BY METALLIZED STRUCTURES ON PACKAGE BODY

A method includes providing a lead frame including a die pad and a plurality of leads, providing a first semiconductor die that includes a first load terminal disposed on a main surface, providing a second semiconductor die that includes a plurality of I/O terminals disposed on a main surface, mount...

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Bibliographische Detailangaben
Hauptverfasser: Wong, Fee Hoon Wendy, Leow, Chin Kee, Saw, Khay Chwan Andrew, Chong, Hoe Jian, Cha, Chan Lam, Daryl Wee, Wern Ken
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A method includes providing a lead frame including a die pad and a plurality of leads, providing a first semiconductor die that includes a first load terminal disposed on a main surface, providing a second semiconductor die that includes a plurality of I/O terminals disposed on a main surface, mounting the first and second semiconductor dies on the lead frame such that the main surfaces of the first and second semiconductor dies face away from the die pad, forming an encapsulant body of mold compound that encapsulates the first and second semiconductor dies, forming a plurality of conductive tracks on an upper surface of the encapsulant body that electrically connect at least some of the I/O terminals to a first group of the leads, and forming a metal pad on the upper surface of the encapsulant body that electrically connects the first load terminal to a second lead.