AUTOMATIC ON-DIE FREQUENCY TUNING USING TUNABLE REPLICA CIRCUITS

Embodiments herein relate to optimizing the operation of multiple integrated circuits (ICs) operating in parallel. In one aspect, the ICs are arranged in a voltage-stacked configuration, and an operating frequency of each IC is controlled using a tunable replica circuit to stabilize its voltage drop. The tunable replica circuit mimics a critical path on the IC. In another aspect, an IC is divided into top and bottom portions which are in respective voltage domains on a substrate. The substrate include a deep n-well region for the higher voltage domain. In another aspect, a physically unclonable function (PUF) is used to generate identifiers for each IC among a multiple ICs on a board. Entropy sources of the PUF generate bits of the identifiers. Unstable entropy sources are identified and their bits are masked out.