SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF
Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gat...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Kuang, Shin-Jiun WU, Chung-Wei Lin, Meng-Yu Cheng, Chun-Fu |
description | Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gate etch back, providing improve gate height control. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023178603A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023178603A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023178603A13</originalsourceid><addsrcrecordid>eNrjZLAIdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB1DfHwdwlW8HdTcHN0CvJ0dgzx9PdTCPFwDXL1d-NhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsaG5hZmBsaOhsbEqQIABbopYA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF</title><source>esp@cenet</source><creator>Kuang, Shin-Jiun ; WU, Chung-Wei ; Lin, Meng-Yu ; Cheng, Chun-Fu</creator><creatorcontrib>Kuang, Shin-Jiun ; WU, Chung-Wei ; Lin, Meng-Yu ; Cheng, Chun-Fu</creatorcontrib><description>Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gate etch back, providing improve gate height control.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230608&DB=EPODOC&CC=US&NR=2023178603A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230608&DB=EPODOC&CC=US&NR=2023178603A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Kuang, Shin-Jiun</creatorcontrib><creatorcontrib>WU, Chung-Wei</creatorcontrib><creatorcontrib>Lin, Meng-Yu</creatorcontrib><creatorcontrib>Cheng, Chun-Fu</creatorcontrib><title>SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF</title><description>Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gate etch back, providing improve gate height control.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAIdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB1DfHwdwlW8HdTcHN0CvJ0dgzx9PdTCPFwDXL1d-NhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsaG5hZmBsaOhsbEqQIABbopYA</recordid><startdate>20230608</startdate><enddate>20230608</enddate><creator>Kuang, Shin-Jiun</creator><creator>WU, Chung-Wei</creator><creator>Lin, Meng-Yu</creator><creator>Cheng, Chun-Fu</creator><scope>EVB</scope></search><sort><creationdate>20230608</creationdate><title>SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF</title><author>Kuang, Shin-Jiun ; WU, Chung-Wei ; Lin, Meng-Yu ; Cheng, Chun-Fu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023178603A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Kuang, Shin-Jiun</creatorcontrib><creatorcontrib>WU, Chung-Wei</creatorcontrib><creatorcontrib>Lin, Meng-Yu</creatorcontrib><creatorcontrib>Cheng, Chun-Fu</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kuang, Shin-Jiun</au><au>WU, Chung-Wei</au><au>Lin, Meng-Yu</au><au>Cheng, Chun-Fu</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF</title><date>2023-06-08</date><risdate>2023</risdate><abstract>Embodiments of the present disclosure relate to forming a nanosheet multi-channel device with an additional spacing layer and a hard mask layer. The additional spacing layer provides a space for an inner spacer above the topmost channel. The hard mask layer functions as an etch stop during metal gate etch back, providing improve gate height control.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2023178603A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T22%3A38%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Kuang,%20Shin-Jiun&rft.date=2023-06-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023178603A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |