STEP INTERCONNECT METALLIZATION TO ENABLE PANEL LEVEL PACKAGING

This disclosure relates to a new package concept that eliminates the need for epoxy or epoxy solder used in traditional clip/lead frame-based power packages. The disclosure overcomes this disadvantage in clip-based packages by depositing the interconnect structure directly to the bod pads. The formation of the interconnect done at lower temperature leads to lower stress induced onto the die. Another advantage of the present disclosure is that semiconductor dies packaged using a method according to the present disclosure will have smaller footprint as the pads are directly built up/deposited. Another advantage of the method according to the present disclosure is that it allows large scale, i.e., panel level processing. Such a panel may include multiple ICs, or transistor or any other semiconductor devices.