METHOD AND DEVICE FOR DEPOSITING AN EPITAXIAL LAYER ON A SUBSTRATE WAFER MADE OF SEMICONDUCTOR MATERIAL

METHOD AND DEVICE FOR DEPOSITING AN EPITAXIAL LAYER ON A SUBSTRATE WAFER MADE OF SEMICONDUCTOR MATERIAL

A method and an apparatus for depositing an epitaxial layer on a substrate wafer made of semiconductor material. The method comprises the arrangement of the substrate wafer and a susceptor in a deposition device such that the substrate wafer rests on the susceptor and the susceptor is held by arms o...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: EDMAIER, Walter, HECHT, Hannes, STETTNER, Thomas, LICHTENEGGER, Korbinian
Format: Patent
Sprache:eng
Schlagworte:
AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE
APPARATUS THEREFOR
BASIC ELECTRIC ELEMENTS
CHEMISTRY
CRYSTAL GROWTH
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
METALLURGY
PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE
REFINING BY ZONE-MELTING OF MATERIAL
SEMICONDUCTOR DEVICES
SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE
SINGLE-CRYSTAL-GROWTH
UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL
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Beschreibung
Zusammenfassung:A method and an apparatus for depositing an epitaxial layer on a substrate wafer made of semiconductor material. The method comprises the arrangement of the substrate wafer and a susceptor in a deposition device such that the substrate wafer rests on the susceptor and the susceptor is held by arms of a support shaft; monitoring whether a misalignment of the susceptor exists with respect to its position relative to the position of a pre-heating ring surrounding it; monitoring whether a misalignment of the support shaft exists with respect to its position relative to the position of the pre-heating ring; if at least one of the misalignments is present, elimination of the respective misalignment; and the deposition of the epitaxial layer on the substrate wafer.