NON-VOLATILE MEMORY DEVICE

A memory device comprises memory cells, a first regulator, a second regulator, a first switch, a second switch and capacitor coupling switches. The first regulator comprises a first capacitor, and generates a first voltage at a first node connected to a first subset of the memory cells, to provide the first voltage to the first subset. The second regulator comprises a second capacitor, and generates a second voltage at a second node. The first switch selectively couples the second node to a second subset of the memory cells, to provide the second voltage to the second subset. The second switch selectively couples the first node to the second subset to also provide the first voltage to the second subset. The capacitor coupling switches selectively couple the second capacitor in parallel to the first capacitor when the first switch is deactivated, and the second switch is activated.