PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES

A microelectronic assembly is provided comprising: a first IC die in a first layer comprising an array of radio frequency (RF) patch antennas on a side opposite to a second layer; a second IC die in the second layer between the first layer and a third layer; and a third IC die in the third layer. Th...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Dogiamis, Georgios, Elsherbini, Adel A
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Dogiamis, Georgios
Elsherbini, Adel A
description A microelectronic assembly is provided comprising: a first IC die in a first layer comprising an array of radio frequency (RF) patch antennas on a side opposite to a second layer; a second IC die in the second layer between the first layer and a third layer; and a third IC die in the third layer. The first IC die comprises RF and analog circuitry, the first IC die is part of an array of IC dies having similar size and circuitry as the first IC die, the second layer and the third layer comprise a dielectric with through-dielectric vias (TDVs) therein surrounding the second IC die and the third IC die, respectively, and an interface between adjacent layers comprises interconnects having a pitch of 10 micrometers between adjacent interconnects.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023144206A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023144206A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023144206A13</originalsourceid><addsrcrecordid>eNrjZHAMcHT2dnT39HNXcAxy9vAMcXUOCQ1yDVZw8w9SCA510g1xDXL0cA0KiVIIcnTx9FdwC3INDHX1c45UcHEN83R2DeZhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsaGJiZGBmaOhsbEqQIAmHssAg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES</title><source>esp@cenet</source><creator>Dogiamis, Georgios ; Elsherbini, Adel A</creator><creatorcontrib>Dogiamis, Georgios ; Elsherbini, Adel A</creatorcontrib><description>A microelectronic assembly is provided comprising: a first IC die in a first layer comprising an array of radio frequency (RF) patch antennas on a side opposite to a second layer; a second IC die in the second layer between the first layer and a third layer; and a third IC die in the third layer. The first IC die comprises RF and analog circuitry, the first IC die is part of an array of IC dies having similar size and circuitry as the first IC die, the second layer and the third layer comprise a dielectric with through-dielectric vias (TDVs) therein surrounding the second IC die and the third IC die, respectively, and an interface between adjacent layers comprises interconnects having a pitch of 10 micrometers between adjacent interconnects.</description><language>eng</language><subject>ANTENNAS, i.e. RADIO AERIALS ; BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230511&amp;DB=EPODOC&amp;CC=US&amp;NR=2023144206A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230511&amp;DB=EPODOC&amp;CC=US&amp;NR=2023144206A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Dogiamis, Georgios</creatorcontrib><creatorcontrib>Elsherbini, Adel A</creatorcontrib><title>PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES</title><description>A microelectronic assembly is provided comprising: a first IC die in a first layer comprising an array of radio frequency (RF) patch antennas on a side opposite to a second layer; a second IC die in the second layer between the first layer and a third layer; and a third IC die in the third layer. The first IC die comprises RF and analog circuitry, the first IC die is part of an array of IC dies having similar size and circuitry as the first IC die, the second layer and the third layer comprise a dielectric with through-dielectric vias (TDVs) therein surrounding the second IC die and the third IC die, respectively, and an interface between adjacent layers comprises interconnects having a pitch of 10 micrometers between adjacent interconnects.</description><subject>ANTENNAS, i.e. RADIO AERIALS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAMcHT2dnT39HNXcAxy9vAMcXUOCQ1yDVZw8w9SCA510g1xDXL0cA0KiVIIcnTx9FdwC3INDHX1c45UcHEN83R2DeZhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsaGJiZGBmaOhsbEqQIAmHssAg</recordid><startdate>20230511</startdate><enddate>20230511</enddate><creator>Dogiamis, Georgios</creator><creator>Elsherbini, Adel A</creator><scope>EVB</scope></search><sort><creationdate>20230511</creationdate><title>PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES</title><author>Dogiamis, Georgios ; Elsherbini, Adel A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023144206A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>ANTENNAS, i.e. RADIO AERIALS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Dogiamis, Georgios</creatorcontrib><creatorcontrib>Elsherbini, Adel A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dogiamis, Georgios</au><au>Elsherbini, Adel A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES</title><date>2023-05-11</date><risdate>2023</risdate><abstract>A microelectronic assembly is provided comprising: a first IC die in a first layer comprising an array of radio frequency (RF) patch antennas on a side opposite to a second layer; a second IC die in the second layer between the first layer and a third layer; and a third IC die in the third layer. The first IC die comprises RF and analog circuitry, the first IC die is part of an array of IC dies having similar size and circuitry as the first IC die, the second layer and the third layer comprise a dielectric with through-dielectric vias (TDVs) therein surrounding the second IC die and the third IC die, respectively, and an interface between adjacent layers comprises interconnects having a pitch of 10 micrometers between adjacent interconnects.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2023144206A1
source esp@cenet
subjects ANTENNAS, i.e. RADIO AERIALS
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title PACKAGING ARCHITECTURES FOR SUB-TERAHERTZ RADIO FREQUENCY DEVICES
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T08%3A07%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Dogiamis,%20Georgios&rft.date=2023-05-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023144206A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true