Transistor Arrangement with a Load Transistor and a Sense Transistor

A transistor arrangement includes a drift and drain region arranged in a semiconductor body and each connected to a drain node, a plurality of load transistor cells each comprising a source region integrated in a first region of the semiconductor body, a plurality of sense transistor cells each comprising a source region integrated in a second region of the semiconductor body, a first source node electrically connected to the source region of each of the plurality of the load transistor cells via a first source conductor, and a second source node electrically connected to the source region of each of the plurality of the sense transistor cells via a second source conductor, and wherein a resistance of the second source conductor is different from a resistance of the first source conductor.