MEMORY DEVICE, MEMORY MODULE INCLUDING THE MEMORY DEVICE, AND OPERATING METHOD OF MEMORY CONTROLLER

A memory device includes a memory cell array including a normal region in which first data is stored and a parity region in which a parity bit for the data is stored, and an error correction code (ECC) engine. The ECC engine is configured to determine whether there is an error in the first data base...

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Bibliographische Detailangaben
Hauptverfasser:	KIM, DAEJEONG, KIM, DOHAN, LEE, HOYOUNG, CHOI, INSU, KO, TAEKYEONG, SEO, DEOKHO, KIM, NAMHYUNG
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	A memory device includes a memory cell array including a normal region in which first data is stored and a parity region in which a parity bit for the data is stored, and an error correction code (ECC) engine. The ECC engine is configured to determine whether there is an error in the first data based on the first data and the parity bit, and to output, in response to receiving an uncorrected read command from a memory controller, second data in a state in which an error bit in the first data is not corrected.