DATA PROCESSING ENGINE ARRANGEMENT IN A DEVICE

DATA PROCESSING ENGINE ARRANGEMENT IN A DEVICE

A device includes a data processing engine array having a plurality of data processing engines organized in a grid having a plurality of rows and a plurality of columns. Each data processing engine includes a core, a memory module including a memory and a direct memory access engine. Each data proce...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Tuan, Tim, Vissers, Kornelis A, Langer, Jan, Ozgul, Baris, Walke, Richard L, Clarke, David, Noguera Serra, Juan J, Bilski, Goran HK, Wittig, Ralph D
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A device includes a data processing engine array having a plurality of data processing engines organized in a grid having a plurality of rows and a plurality of columns. Each data processing engine includes a core, a memory module including a memory and a direct memory access engine. Each data processing engine includes a stream switch connected to the core, the direct memory access engine, and the stream switch of one or more adjacent data processing engines. Each memory module includes a first memory interface directly coupled to the core in the same data processing engine and one or more second memory interfaces directly coupled to the core of each of the one or more adjacent data processing engines.