LOW POWER STANDBY MODE FOR MEMORY DEVICES

LOW POWER STANDBY MODE FOR MEMORY DEVICES

A memory device, can include: a control circuit configured to operate the memory device in one of an active mode, a standby mode, and a sleep mode, where the memory device is configured to receive a command from a host device when in the standby mode; a voltage regulator having an output that provid...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Pedersen, Bard M, Intrater, Gideon
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A memory device, can include: a control circuit configured to operate the memory device in one of an active mode, a standby mode, and a sleep mode, where the memory device is configured to receive a command from a host device when in the standby mode; a voltage regulator having an output that provides a supply voltage for accessing contents of memory cells in the memory device, where the voltage regulator is off during the sleep mode and the standby mode, and the voltage regulator is on during the active mode; and a storage element configured to maintain the supply voltage to allow the voltage regulator to be turned off during the standby mode, and at least until the voltage regulator turns on in the active mode and supports the supply voltage.