Method and apparatus having a scalable architecture for neural networks

An artificial intelligence processor can optimize the usage of its neural network to process a data set more efficiently. The artificial intelligence processor can have a neural network of multiple arithmetic logic units each having one or more computing engines and a local arithmetic memory divided...

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Hauptverfasser: Setty, Ravi Sreenivasa, Bandaaru, Venkateswarlu, Mital, Deepak, Ursachi, Vlad Ionut
Format: Patent
Sprache:eng
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Zusammenfassung:An artificial intelligence processor can optimize the usage of its neural network to process a data set more efficiently. The artificial intelligence processor can have a neural network of multiple arithmetic logic units each having one or more computing engines and a local arithmetic memory divided into a set of clusters arranged into a node ring. A scheduler with a local scheduler memory for each cluster. An advanced extensible interface can read a data set model from an external memory in a single data read. A memory manager can control the node ring. When a data size of the data set is larger than a processing model layer for processing the data set, the memory manager can slice the data set into data set chunks. The memory manager can assign a data set chunk to a data cluster. The memory manager can broadcast channel instructions from the processing model layer to every cluster. The memory manager can process the data set chunk in the data cluster according to the channel instructions of the processing model. Alternately, when the data size of the data set is smaller than the processing model layer, the memory manager can slice the processing model layer into channel chunks. The memory manager can assign a channel chunk to a channel cluster. The memory manager can broadcast the data set to every cluster. The memory manager can process the data set chunk according to channel instructions of the channel chunk.