CONTROLLER AND MEMORY SYSTEM

CONTROLLER AND MEMORY SYSTEM

A controller includes a physical layer interface circuit configured to support a first port and a second port both conforming to a PCIe standard, the first port including a first number of lanes with a first order, the second port including a second number of lanes with a second order, and the first...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: TSURUMI, Hiroshi
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A controller includes a physical layer interface circuit configured to support a first port and a second port both conforming to a PCIe standard, the first port including a first number of lanes with a first order, the second port including a second number of lanes with a second order, and the first number of lanes and the second number of lanes being connected to the physical layer interface circuit via traces arranged in an order in which at least a part of the first order and at least a part of the second order are changed based on Lane Reversal conforming to the PCIe standard.