NAND DATA PLACEMENT SCHEMA

NAND DATA PLACEMENT SCHEMA

Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios.The present disclosure stripes data diagonally across page lines and plan...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Papa, Paolp, Sassara, Alberto, D'Eliseo, Giuseppe, Iaculo, Massimo, Manganelli, Carminantonio
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
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Beschreibung
Zusammenfassung:Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios.The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.