SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device according to an embodiment includes a substrate, a lower interconnect, a source line, word lines, a pillar, a pattern portion, a contact. The source line is provided in a first layer above the lower interconnect. The pattern portion is provided to be separated and insul...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ICHINOSE, Daigo, MITO, Hiroki
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A semiconductor memory device according to an embodiment includes a substrate, a lower interconnect, a source line, word lines, a pillar, a pattern portion, a contact. The source line is provided in a first layer above the lower interconnect. The pattern portion is provided to be separated and insulated from the source line in the first layer. A contact is extending in a first direction, penetrating the pattern portion, and provided on the lower interconnect. A width of the contact in a second direction parallel to a surface of the substrate differs between a portion above a boundary plane that is included in the first layer and is parallel to the surface of the substrate, and a portion below the boundary plane.