BUFFER CIRCUIT CAPABLE OF ADJUSTING A GAIN, RECEIVING CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME
A buffer circuit receives a first input signal and a second input signal to generate a first output signal and a second output signal. The buffer circuit includes a load circuit. The load circuit receives a gain adjustment signal. The load circuit increases a total gain of the buffer circuit when th...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A buffer circuit receives a first input signal and a second input signal to generate a first output signal and a second output signal. The buffer circuit includes a load circuit. The load circuit receives a gain adjustment signal. The load circuit increases a total gain of the buffer circuit when the gain adjustment signal is disabled and increases an AC gain of the buffer circuit when the gain adjustment signal is enabled. |
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