COMPUTATION OF NEURAL NETWORK NODE BY NEURAL NETWORK INFERENCE CIRCUIT

Some embodiments provide a neural network inference circuit (NNIC) for executing a neural network that includes multiple computation nodes at multiple layers. The NNIC includes a set of clusters of core computation circuits and a channel, connecting the core computation circuits, that includes separ...

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Bibliographische Detailangaben
Hauptverfasser: Teig, Steven L, Duong, Kenneth, Ko, Jung
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Some embodiments provide a neural network inference circuit (NNIC) for executing a neural network that includes multiple computation nodes at multiple layers. The NNIC includes a set of clusters of core computation circuits and a channel, connecting the core computation circuits, that includes separate segments corresponding to each of the clusters. The NNIC includes a fabric controller circuit, a cluster controller circuit for each of the clusters, and a core controller circuit for each of the core computation circuits. The fabric controller circuit receives high-level neural network instructions from a microprocessor and parses the high-level neural network instructions.