Power Management Based on Limiting Hardware-Forced Power Control

Power Management Based on Limiting Hardware-Forced Power Control

Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Specifically, a power manager circuit in an integrated circuit (e.g., a system on a chip) may modify power budgets for various components in the integrated circuit to reduce the amount...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Kuzi, Tal, Wulcan, Karl Daniel, Rajwan, Doron, Sodhi, Inder M, Zahir, Achmed R
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Various techniques and circuit implementations for power reduction management in integrated circuits are disclosed. Specifically, a power manager circuit in an integrated circuit (e.g., a system on a chip) may modify power budgets for various components in the integrated circuit to reduce the amount of power control caused by external signaling that indicates a voltage regulator overload (e.g., a voltage droop).