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A shift register includes n shift register units which are cascaded. Each shift register unit includes a shift module and multiple enable modules. The shift module of an i-th-level shift register unit is configured to receive and latch a shift signal output by the shift module in an (i−1)-th-level s...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A shift register includes n shift register units which are cascaded. Each shift register unit includes a shift module and multiple enable modules. The shift module of an i-th-level shift register unit is configured to receive and latch a shift signal output by the shift module in an (i−1)-th-level shift register unit. The multiple enable modules of the i-th-level shift register unit are electrically connected to the shift module of the i-th-level shift register unit, and each of the multiple enable modules is configured to generate a gate driving signal according to the shift signal. n and i are positive integers, 1≤i≤n. |
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