EXCLUSION RING WITH FLOW PATHS FOR EXHAUSTING WAFER EDGE GAS

An exclusion ring for semiconductor wafer processing includes an outer circumferential segment having a first thickness and an inner circumferential segment having a second thickness, with the first thickness being greater than the second thickness. The top surface of an inner circumferential segmen...

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Bibliographische Detailangaben
Hauptverfasser:	Lenz, Eric H, Gulabal, Vinayakaraddy, Vellanki, Ravi
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
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Beschreibung
Zusammenfassung:	An exclusion ring for semiconductor wafer processing includes an outer circumferential segment having a first thickness and an inner circumferential segment having a second thickness, with the first thickness being greater than the second thickness. The top surface of an inner circumferential segment and the top surface of the outer circumferential segment define a common top surface for the exclusion ring. A plurality of flow paths is formed within the outer circumferential segment, with each of the flow paths extending radially through the plurality of flow paths provides for exhaust of a wafer edge gas from the pocket where a wafer has an edge thereof disposed below part of the inner circumferential portion. The exhausting of the wafer edge gas from the pocket prevents up-and-down movement of the exclusion ring when bowed wafers are processed.