SEMICONDUCTOR DEVICE

A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: HONG, Jae Ho, LEE, Kyung Hwan, KIM, Hui-Jung, KIM, Yong Seok, HWANG, Yoo Sang, YAMADA, Satoru, PARK, Seok Han
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator HONG, Jae Ho
LEE, Kyung Hwan
KIM, Hui-Jung
KIM, Yong Seok
HWANG, Yoo Sang
YAMADA, Satoru
PARK, Seok Han
description A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023019055A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023019055A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023019055A13</originalsourceid><addsrcrecordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsYGhpYGpqaOhsbEqQIA-9gflA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>HONG, Jae Ho ; LEE, Kyung Hwan ; KIM, Hui-Jung ; KIM, Yong Seok ; HWANG, Yoo Sang ; YAMADA, Satoru ; PARK, Seok Han</creator><creatorcontrib>HONG, Jae Ho ; LEE, Kyung Hwan ; KIM, Hui-Jung ; KIM, Yong Seok ; HWANG, Yoo Sang ; YAMADA, Satoru ; PARK, Seok Han</creatorcontrib><description>A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230119&amp;DB=EPODOC&amp;CC=US&amp;NR=2023019055A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230119&amp;DB=EPODOC&amp;CC=US&amp;NR=2023019055A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HONG, Jae Ho</creatorcontrib><creatorcontrib>LEE, Kyung Hwan</creatorcontrib><creatorcontrib>KIM, Hui-Jung</creatorcontrib><creatorcontrib>KIM, Yong Seok</creatorcontrib><creatorcontrib>HWANG, Yoo Sang</creatorcontrib><creatorcontrib>YAMADA, Satoru</creatorcontrib><creatorcontrib>PARK, Seok Han</creatorcontrib><title>SEMICONDUCTOR DEVICE</title><description>A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsYGhpYGpqaOhsbEqQIA-9gflA</recordid><startdate>20230119</startdate><enddate>20230119</enddate><creator>HONG, Jae Ho</creator><creator>LEE, Kyung Hwan</creator><creator>KIM, Hui-Jung</creator><creator>KIM, Yong Seok</creator><creator>HWANG, Yoo Sang</creator><creator>YAMADA, Satoru</creator><creator>PARK, Seok Han</creator><scope>EVB</scope></search><sort><creationdate>20230119</creationdate><title>SEMICONDUCTOR DEVICE</title><author>HONG, Jae Ho ; LEE, Kyung Hwan ; KIM, Hui-Jung ; KIM, Yong Seok ; HWANG, Yoo Sang ; YAMADA, Satoru ; PARK, Seok Han</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023019055A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HONG, Jae Ho</creatorcontrib><creatorcontrib>LEE, Kyung Hwan</creatorcontrib><creatorcontrib>KIM, Hui-Jung</creatorcontrib><creatorcontrib>KIM, Yong Seok</creatorcontrib><creatorcontrib>HWANG, Yoo Sang</creatorcontrib><creatorcontrib>YAMADA, Satoru</creatorcontrib><creatorcontrib>PARK, Seok Han</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HONG, Jae Ho</au><au>LEE, Kyung Hwan</au><au>KIM, Hui-Jung</au><au>KIM, Yong Seok</au><au>HWANG, Yoo Sang</au><au>YAMADA, Satoru</au><au>PARK, Seok Han</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE</title><date>2023-01-19</date><risdate>2023</risdate><abstract>A semiconductor device is provided. The semiconductor device includes a first stacked structure including a plurality of first insulating patterns and a plurality of first semiconductor patterns alternately stacked on a substrate, the first stacked structure extending in a first direction parallel to an upper surface of the substrate, a first conductive pattern on one side surface of the first stacked structure, the first conductive pattern extending in a second direction crossing the upper surface of the substrate, and a first ferroelectric layer between the first stacked structure and the first conductive pattern, the first ferroelectric layer extending in the second direction, wherein each of the first semiconductor patterns includes a first impurity region, a first channel region and a second impurity region which are sequentially arranged along the first direction.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2023019055A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T03%3A45%3A35IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HONG,%20Jae%20Ho&rft.date=2023-01-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023019055A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true