SEMICONDUCTOR PACKAGE INCLUDING PHOTO IMAGEABLE DIELECTRIC

A semiconductor package includes a frame, a semiconductor chip, a through via, a connection pad, a lower redistribution layer on the bottom surfaces of the frame and the semiconductor chip, a connection terminal on the lower redistribution layer, an encapsulant covering the top surfaces of the frame and the semiconductor chip, and an upper redistribution layer on the encapsulant. The lower redistribution layer includes a lower insulating layer, a lower redistribution pattern, and an under-bump metal (UBM). The upper redistribution layer includes an upper insulating layer, an upper redistribution pattern, an upper via, and an upper connection pad. The lower insulating layer includes an inner insulating pattern surrounding the side surface of the UBM and an outer insulating pattern surrounding the side surface of the inner insulating pattern. The cyclization rate of the inner insulating pattern is higher than the cyclization rate of the outer insulating pattern.