LOCAL DENSITY CONTROL FOR METAL CAPACITANCE REDUCTION

LOCAL DENSITY CONTROL FOR METAL CAPACITANCE REDUCTION

An integrated circuit structure includes a plurality of interconnect lines and a plurality of dummy lines that are co-planar with the plurality of interconnect lines, where a ratio of line length to end-to-end spacing of the dummy lines varies inversely with a density of the interconnect lines withi...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Bhawe, Dhananjay, Baylav, Burak
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:An integrated circuit structure includes a plurality of interconnect lines and a plurality of dummy lines that are co-planar with the plurality of interconnect lines, where a ratio of line length to end-to-end spacing of the dummy lines varies inversely with a density of the interconnect lines within each of a plurality of regions. The regions are of approximately equal area within a rectangular grid array.