WAFER WITH SEMICONDUCTOR DEVICES AND INTEGRATED ELECTROSTATIC DISCHARGE PROTECTION

A wafer includes a substrate that includes a channel layer, a first active region, a second active region, and a saw street region between the first active region and the second active region. The wafer includes a first device formed on the substrate in the first active region. The first device incl...

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Bibliographische Detailangaben
Hauptverfasser: Ramply, Colby Greg, Green, Bruce McRae, Burdeaux, David Cobb
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A wafer includes a substrate that includes a channel layer, a first active region, a second active region, and a saw street region between the first active region and the second active region. The wafer includes a first device formed on the substrate in the first active region. The first device includes a first portion of the channel layer. The wafer includes a second device formed on the substrate in the second active region. The second device includes a second portion of the channel layer. The wafer includes a conductive channel between the first active region and the second active region. The conductive channel is in the saw street of the wafer and includes a third portion of the channel layer.