Digital Signal Processor and Method

Digital Signal Processor and Method

A digital signal processor according to an embodiment comprises a processing stage. The processing stage is configured to receive Cartesian coordinates of a vector in a floating point format and to output polar coordinates of the vector in a floating point format. The processing stage comprises a fi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Gobin, Pierre, Ribeiro De Freitas, Jeremy
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A digital signal processor according to an embodiment comprises a processing stage. The processing stage is configured to receive Cartesian coordinates of a vector in a floating point format and to output polar coordinates of the vector in a floating point format. The processing stage comprises a first electronic circuit configured to iteratively implement, timed by a clock signal, a CORDIC algorithm in a floating point format.