INTERLACED CROSSTALK CONTROLLED TRACES, VIAS, AND CAPACITORS

A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Scearce, Stephen Aubrey, Asl, Shadi Ebrahimi, Scott, Linda W, Gaumer, Quinn
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A multilayer printed circuit board having a stackup including an upper half of the stackup and a lower half of the stackup, the multilayer printed circuit board having a top exposed surface and a bottom exposed surface, a first trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, a second trace and via structure, having one portion disposed on the top exposed surface and another portion disposed within the upper half of the stackup, and first electrical components and second electrical components disposed on the top exposed surface of the multilayer printed circuit board and associated, respectively, with the first trace and via structure and the second trace and via structure, wherein the first electrical components are mounted orthogonally with respect to the second electrical components.