HDR IMAGE SENSOR EMPLOYING MULTI-TAP PIXEL ARCHITECTURE AND METHOD FOR OPERATING SAME

An image sensor may include control circuitry, a plurality of pixels, and an image processor. Each pixel includes a photodetector, at least first and second storage nodes, and transfer circuitry. The transfer circuitry is responsive to control signals generated by the control circuitry to transfer first charges generated by the photodetector during a first exposure time within a frame period to the first storage node. Second charges may be generated by the photodetector during a second, longer exposure time during the frame period, and transferred to the second storage node. The image processor may generate image frame data based on output voltage samples derived from the first and second charges of each of the plurality of pixels.