STRESS AND OVERLAY MANAGEMENT FOR SEMICONDUCTOR PROCESSING

Provided are methods of reducing the stress of a semiconductor wafer. A wafer map of a free-standing wafer is created using metrology tools. The wafer map is then converted into a power spectral density (PSD) using a spatial frequency scale. The fundamental component of bow is then compensated with...

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Bibliographische Detailangaben
Hauptverfasser: Subrahmanyan, Pradeep K, Kang, Sean S, Varghese, Sony
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Provided are methods of reducing the stress of a semiconductor wafer. A wafer map of a free-standing wafer is created using metrology tools. The wafer map is then converted into a power spectral density (PSD) using a spatial frequency scale. The fundamental component of bow is then compensated with a uniform film, e.g., silicon nitride (SiN), deposited on the back side of the wafer.