Power Semiconductor Package Unit of Surface Mount Technology and Manufacturing Method Thereof

The present invention includes a chip, a plastic film layer, and an electroplated layer. A front side and a back side of the chip each comprises a signal contact. The plastic film layer covers the chip and includes a first via and a second via. The first via is formed adjacent to the chip, and the s...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Wang, Chien-Chun, Li, Chi-Hsueh, Ho, Chung-Hsiung, Huang, Wen-Liang, Hung, Wei-Ming, Shen, Shun-Chi
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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