VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND ASSOCIATED METHODS

A vertical semiconductor device may include a semiconductor substrate having at least one trench therein, and a superlattice layer extending vertically adjacent the at least one trench. The superlattice layer may comprise stacked groups of layers, with each group of layers comprising stacked base se...

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Bibliographische Detailangaben
Hauptverfasser: CONNELLY, DANIEL, CODY, NYLES WYNN, CHOUTOV, DMITRI, BURTON, RICHARD, MEARS, ROBERT J, TRAUTMANN, ERWIN, STEPHENSON, ROBERT JOHN
Format: Patent
Sprache:eng
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Zusammenfassung:A vertical semiconductor device may include a semiconductor substrate having at least one trench therein, and a superlattice layer extending vertically adjacent the at least one trench. The superlattice layer may comprise stacked groups of layers, with each group of layers comprising stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer. Each at least one non-semiconductor monolayer of each group of layers may be constrained within a crystal lattice of adjacent base semiconductor portions. The vertical semiconductor device may also include a doped semiconductor layer adjacent the superlattice layer, and a conductive body adjacent the doped semiconductor layer on a side thereof opposite the superlattice layer and defining a vertical semiconductor device contact.