SYSTEM-ON-CHIP AND METHOD OF OPERATING THE SAME

A system-on-chip is provided. The system-on-chip includes a system bus, a plurality of IP units connected to the system bus, a processor unit including a plurality of cores configured to control the plurality of IP units via the system bus, a monitoring unit configured to monitor a state of the proc...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: JANG, Moonki, KIM, Jiwoong
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A system-on-chip is provided. The system-on-chip includes a system bus, a plurality of IP units connected to the system bus, a processor unit including a plurality of cores configured to control the plurality of IP units via the system bus, a monitoring unit configured to monitor a state of the processor unit, and an error detection unit configured to operate as a master device for the plurality of IP units and monitor a register in which error information indicating whether an error has occurred in each of the plurality of IP units is stored.