PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME

PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME

A bottom portion of a Ta pillar serving as a contact portion is connected to an N+ layer and a P+ layer, and a gate HfO2 layer is connected to side surfaces of Si pillars and a Ta pillar serving as a contact portion and an upper surface of a SiO2 layer between the Si pillars and the Ta pillar servin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MASUOKA, Fujio, HARADA, Nozomu
Format: Patent
Sprache:eng
Schlagworte:
ELECTRICITY
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Beschreibung
Zusammenfassung:A bottom portion of a Ta pillar serving as a contact portion is connected to an N+ layer and a P+ layer, and a gate HfO2 layer is connected to side surfaces of Si pillars and a Ta pillar serving as a contact portion and an upper surface of a SiO2 layer between the Si pillars and the Ta pillar serving as the contact portion. Gate TiN layers are provided on a side surface of the gate HfO2 layer surrounding the Si pillars. Midpoints of the Si pillars and the Ta pillar serving as the contact portion are on one first line in plan view.