LOCALIZED STRESS REGIONS FOR THREE-DIMENSION CHIPLET FORMATION

Aspects of the present disclosure provide a method for forming a chiplet onto a semiconductor structure. For example, the method can include providing a first semiconductor structure having a first circuit and a first wiring structure formed on a first side thereof. The method can further include attaching the first side of the first semiconductor structure to a carrier substrate. The method can further include forming a stress film on a second side of the first semiconductor structure. The method can further include separating the carrier substrate from the first semiconductor structure. The method can further include cutting the stress film and the first semiconductor structure to define at least one chiplet. The method can further include bonding the at least one chiplet to a second semiconductor structure having a second circuit and a second wiring structure such that the second wiring structure is connected to the first wiring structure.