DIGITAL SYSTEM SYNCHRONIZATION

A semiconductor package includes source clock circuitry to generate a source clock signal. Reference clock circuitry generates a reference clock signal. A first timing circuit includes a first source clock input to receive the source clock signal. First fan-out circuitry distributes the received sou...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Fredenburg, Jeffrey Alan, Moore, David, Faisal, Mohammad, Huang, Yu
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A semiconductor package includes source clock circuitry to generate a source clock signal. Reference clock circuitry generates a reference clock signal. A first timing circuit includes a first source clock input to receive the source clock signal. First fan-out circuitry distributes the received source clock signal as a first distributed clock signal to a first set of clocked devices. A first delay circuit delays the received source clock signal by a first delay value based on a first phase difference between the first distributed clock signal and the reference clock signal.