POWER AND PERFORMANCE OPTIMIZATION IN A MEMORY SUBSYSTEM

POWER AND PERFORMANCE OPTIMIZATION IN A MEMORY SUBSYSTEM

Hardware and/or software that dynamically enables or disables CRC and/or adjust voltage level of power supply to a physical layer block on a host by determining an optimum tradeoff between power and performance. The hardware and/or software decreases the voltage level for the power supply and enable...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Mathiyalagan, Vijay Anand, Mitra, Sambaran
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:Hardware and/or software that dynamically enables or disables CRC and/or adjust voltage level of power supply to a physical layer block on a host by determining an optimum tradeoff between power and performance. The hardware and/or software decreases the voltage level for the power supply and enables CRC to compensate signal errors (e.g., errors from signal integrity issues). Hardware and/or software dynamically adjusts voltage level of the power supply rail based on the throughput or speed of the DDR link. In some examples, depending on read or write operations, the voltage level of the power supply rail is adjusted.