INCREMENTAL JUST-IN-TIME (JIT) PERFORMANCE REFINEMENT FOR PROGRAMMABLE LOGIC DEVICE OFFLOAD

INCREMENTAL JUST-IN-TIME (JIT) PERFORMANCE REFINEMENT FOR PROGRAMMABLE LOGIC DEVICE OFFLOAD

An apparatus to facilitate incremental just-in-time (JIT) performance refinement for programmable logic device offload is disclosed. The apparatus includes a processor to: initiate multiple just-in-time (JIT) compilation iterations of an application; program a first architecture of a first compilati...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Poornachandran, Rajesh, Freeman, John, Ashbaugh, Ben J, Kinsner, Michael
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:An apparatus to facilitate incremental just-in-time (JIT) performance refinement for programmable logic device offload is disclosed. The apparatus includes a processor to: initiate multiple just-in-time (JIT) compilation iterations of an application; program a first architecture of a first compilation of the multiple JIT compilation iterations to a programmable logic device and execute the application on the first architecture, wherein the first compilation comprises a faster compilation time amongst the multiple JIT compilation iterations; identify a hotspot; determine that a second compilation of the multiple JIT compilation iterations is complete, wherein the second compilation comprises a slower compilation time than the first compilation; and program a second architecture of the second compilation of the multiple JIT compilation iterations to the programmable logic device and execute the application on the second architecture.