METHOD OF MANUFACTURING PRINTED WIRING BOARD

There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the rough...

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Bibliographische Detailangaben
Hauptverfasser:	SHIMIZU, Yoshinori, IIDA, Hiroto, MIZOGUCHI, Misato, TAKANASHI, Akitoshi, HOSOKAWA, Makoto
Format:	Patent
Sprache:	eng
Schlagworte:	APPARATUS SPECIALLY ADAPTED THEREFOR APPARATUS THEREFOR CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS CHEMICAL SURFACE TREATMENT CHEMISTRY CINEMATOGRAPHY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROFORMING ELECTROGRAPHY ELECTROLYTIC OR ELECTROPHORETIC PROCESSES HOLOGRAPHY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS MATERIALS THEREFOR METALLURGY ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS PRINTED CIRCUITS PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTIONOF COATINGS SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
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Beschreibung
Zusammenfassung:	There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 μm thick having a surface having an arithmetic mean waviness Wa of 0.10 μm or more and 0.25 μm or less and a valley portion void volume Vvv of 0.010 μm3/μm2 or more and 0.028 μm3/μm2 or less; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.