SYSTEMS AND METHODS FOR IMPROVED MAPPING OF COMPUTATIONAL LOOPS ON RECONFIGURABLE ARCHITECTURES

SYSTEMS AND METHODS FOR IMPROVED MAPPING OF COMPUTATIONAL LOOPS ON RECONFIGURABLE ARCHITECTURES

Various embodiments of a system and associated method for generating a valid mapping for a computational loop on a CGRA are disclosed herein. In particular, the method includes generating randomized schedules within particular constraints to explore greater mapping spaces than previous approaches. F...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Shrivastava, Aviral, Balasubramanian, Mahesh
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Various embodiments of a system and associated method for generating a valid mapping for a computational loop on a CGRA are disclosed herein. In particular, the method includes generating randomized schedules within particular constraints to explore greater mapping spaces than previous approaches. Further, the system and related method employs a feasibility test to test validity of each schedule such that mappings are only generated from valid schedules.